Peter Magnusson and Bengt Werner, ``Some Efficient Techniques for
Simulating Memory'', SICS Report R94:16, 1994.

Abstract: : We describe novel techniques used for efficient simulation
of memory in SIMICS, an instruction level simulator developed at
SICS. The design has focused on efficiently supporting the simulation
of multiprocessors, analyzing complex memory hierarchies and running
large binaries with a mixture of system-level and user-level code. A
software caching mechanism (the Simulator Translation Cache, STC)
improves the performance of interpreted memory operations by reducing
the number of calls to complex memory simulatin code.  A lazy memory
allocation scheme reduces the size of the simulator process.  A
well-defined internal interface to generic memory simulation
simplifies user extensions.  Leveraging on a flexible interpreter
based on threaded code allows runtime selection of statistics
gathering, memory profiling, and cache simulation with low overhead.
The result is a memory simulation that supports a range of features
for use in computer architecture research, profgram profiling, and
debugging.